TEXT View Source
# ACER, INC.
ISA486GLi MODEL I333A
Processor 80386DX/CX486DLC
Processor Speed 33/40MHz
Chip Set ALI
Max. Onboard DRAM 32MB
Cache 64/256KB
BIOS Acer
Dimensions 220mm x 240mm
I/O Options None
NPU Options 80387/CX387DLC
IMG IMG 1
+------------------------------------------------------------+
| CONNECTIONS |
|------------------------------------------------------------|
| Purpose | Location | Purpose | Location |
|---------------------+-----------+--------------+-----------|
| External battery | JP7 | Turbo LED | JP12/12 & |
| | | | 13 |
|---------------------+-----------+--------------+-----------|
| Power LED & keylock | JP12/1 - | Turbo switch | JP12/15 - |
| | 5 | | 17 |
|---------------------+-----------+--------------+-----------|
| Speaker | JP12/7 - | Reset switch | JP12/19 & |
| | 10 | | 20 |
+------------------------------------------------------------+
+------------------------------------------------------------+
| USER CONFIGURABLE SETTINGS |
|------------------------------------------------------------|
| Function | Jumper | Position |
|--------------------------------+--------+------------------|
| ยป | CMOS memory normal | JP11 | open |
| | operation | | |
|---+----------------------------+--------+------------------|
| | CMOS memory clear | JP11 | closed |
|---+----------------------------+--------+------------------|
| | CPU speed select 33MHz | JP13 | pins 1 & 2 |
| | | | closed |
|---+----------------------------+--------+------------------|
| | CPU speed select 40MHz | JP13 | pins 1 & 2 and 3 |
| | | | & 4 closed |
+------------------------------------------------------------+
+------------------------------------------------------------+
| DRAM CONFIGURATION |
|------------------------------------------------------------|
| Size | Bank 0 | Bank 1 |
|------------------+--------------------+--------------------|
| 1MB | (4) 256K x 9 | NONE |
|------------------+--------------------+--------------------|
| 2MB | (4) 256K x 9 | (4) 256K x 9 |
|------------------+--------------------+--------------------|
| 4MB | (4) 1M x 9 | NONE |
|------------------+--------------------+--------------------|
| 5MB | (4) 1M x 9 | (4) 256K x 9 |
|------------------+--------------------+--------------------|
| 8MB | (4) 1M x 9 | (4) 1M x 9 |
|------------------+--------------------+--------------------|
| 16MB | (4) 4M x 9 | NONE |
|------------------+--------------------+--------------------|
| 17MB | (4) 256K x 9 | (4) 4M x 9 |
|------------------+--------------------+--------------------|
| 20MB | (4) 1M x 9 | (4) 4M x 9 |
|------------------+--------------------+--------------------|
| 32MB | (4) 4M x 9 | (4) 4M x 9 |
+------------------------------------------------------------+
+------------------------------------------------------------+
| SRAM CONFIGURATION |
|------------------------------------------------------------|
| Size | Cache | Location | TAG | Dirty | JP10 |
| | SRAM | | | Bit (DB) | |
|-------+----------+----------+----------+----------+--------|
| 64KB | (8) 8K x | Banks 0 | (1) 8K x | (1) 16K | open |
| | 8 | & 1 | 8 | x 4 | |
|-------+----------+----------+----------+----------+--------|
| 256KB | (8) 32K | Banks 0 | (1) 32K | (1) 16K | closed |
| | x 8 | & 1 | x 8 | x 4 | |
|------------------------------------------------------------|
| Note:JP10 is closed by shorting pins 1 & 2, 3 & 4, and 5 & |
| 6. |
+------------------------------------------------------------+