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       # SEE-THRU DATA SYSTEMS, LTD.
       
          STO98C
       
          Processor    80386DX/CX486DLC/80486SX/80487SX/80486DX/80486DX2 
          Processor    20/25/33/40/50(internal)/50/66(internal)          
          Speed        
          Chip Set     OPTI                                              
          Max. Onboard 32MB                                              
          DRAM         
          SRAM Cache   64/128/256KB                                      
          BIOS         MR                                                
          Dimensions   220mm x 220mm                                     
          I/O Options  None                                              
          NPU Options  None                                              
       
   IMG IMG 1
          
       
          +------------------------------------------------------------+
          |                        CONNECTIONS                         |
          |------------------------------------------------------------|
          | Purpose             | Location | Purpose        | Location |
          |---------------------+----------+----------------+----------|
          | External battery    |    J9    | Turbo switch   |   JP12   |
          |---------------------+----------+----------------+----------|
          | Power LED & keylock |   J18    | Turbo LED      |   JP13   |
          |---------------------+----------+----------------+----------|
          | Speaker             |   JP11   | Reset switch   |    S1    |
          +------------------------------------------------------------+
       
          +------------------------------------------------------------+
          |                 USER CONFIGURABLE SETTINGS                 |
          |------------------------------------------------------------|
          |              Function              | Jumper |   Position   |
          |------------------------------------+--------+--------------|
          | » | Monitor type select monochrome |  JP1   |     open     |
          |---+--------------------------------+--------+--------------|
          |   | Monitor type select color      |  JP1   |    closed    |
          |---+--------------------------------+--------+--------------|
          | » | CMOS memory normal operation   |  JP2   |  pins 2 & 3  |
          |   |                                |        |    closed    |
          |---+--------------------------------+--------+--------------|
          |   | CMOS memory clear              |  JP2   |  pins 1 & 2  |
          |   |                                |        |    closed    |
          +------------------------------------------------------------+
       
          +------------------------------------------------------------+
          |                     SRAM CONFIGURATION                     |
          |------------------------------------------------------------|
          | Size  | Cache  | Location |   TAG    |   TAG    |  Dirty   |
          |       |        |          |  (U31)   |  (U32)   |   Bit    |
          |       |        |          |          |          |  (U42)   |
          |-------+--------+----------+----------+----------+----------|
          | 64KB  | (8) 8K | Banks 0  |   NONE   | (1) 8K x | (1) 16K  |
          |       |  x 8   |   & 1    |          |    8     |   x 4    |
          |-------+--------+----------+----------+----------+----------|
          | 128KB |  (4)   |  Bank 0  |   NONE   | (1) 8K x | (1) 16K  |
          |       | 32K x  |          |          |    8     |   x 4    |
          |       |   8    |          |          |          |          |
          |-------+--------+----------+----------+----------+----------|
          | 128KB |  (4)   |  Bank 0  |   NONE   | (1) 32K  | (1) 16K  |
          |       | 32K x  |          |          |   x 8    |   x 4    |
          |       |   8    |          |          |          |          |
          |-------+--------+----------+----------+----------+----------|
          | 256KB |  (8)   | Banks 0  |   NONE   | (1) 32K  | (1) 16K  |
          |       | 32K x  |   & 1    |          |   x 8    |   x 4    |
          |       |   8    |          |          |          |          |
          |-------+--------+----------+----------+----------+----------|
          | 256KB |  (8)   | Banks 0  | (1) 8K x | (1) 8K x | (1) 16K  |
          |       | 32K x  |   & 1    |    8     |    8     |   x 4    |
          |       |   8    |          |          |          |          |
          +------------------------------------------------------------+
       
          +------------------------------------------------------------+
          |                 SRAM JUMPER CONFIGURATION                  |
          |------------------------------------------------------------|
          |   Size    |      JP3      |    JP4     |   JP7   |   JP8   |
          |-----------+---------------+------------+---------+---------|
          |   64KB    |  pins 2 & 3   | pins 2 & 3 |  open   |  open   |
          |           |    closed     |   closed   |         |         |
          |-----------+---------------+------------+---------+---------|
          |   128KB   |  pins 1 & 2   | pins 1 & 2 | closed  |  open   |
          |           |    closed     |   closed   |         |         |
          |-----------+---------------+------------+---------+---------|
          |   128KB   |  pins 1 & 2   | pins 1 & 2 | closed  |  open   |
          |           |    closed     |   closed   |         |         |
          |-----------+---------------+------------+---------+---------|
          |   256KB   |  pins 2 & 3   | pins 2 & 3 | closed  |  open   |
          |           |    closed     |   closed   |         |         |
          |-----------+---------------+------------+---------+---------|
          |  256KB 1  |  pins 2 & 3   | pins 2 & 3 |  open   | closed  |
          |           |    closed     |   closed   |         |         |
          |------------------------------------------------------------|
          | Note 1 :Jumpers are in this position only when using (2)   |
          | 8K x 8 in TAG sockets U31 & U32.                           |
          +------------------------------------------------------------+
       
          +------------------------------------------------------------+
          |                     DRAM CONFIGURATION                     |
          |------------------------------------------------------------|
          |       Size       |       Bank 0       |       Bank 1       |
          |------------------+--------------------+--------------------|
          |       1MB        |    (4) 256K x 9    |        NONE        |
          |------------------+--------------------+--------------------|
          |       2MB        |    (4) 256K x 9    |    (4) 256K x 9    |
          |------------------+--------------------+--------------------|
          |       4MB        |     (4) 1M x 9     |        NONE        |
          |------------------+--------------------+--------------------|
          |       5MB        |    (4) 256K x 9    |     (4) 1M x 9     |
          |------------------+--------------------+--------------------|
          |       8MB        |     (4) 1M x 9     |     (4) 1M x 9     |
          |------------------+--------------------+--------------------|
          |       16MB       |     (4) 4M x 9     |        NONE        |
          |------------------+--------------------+--------------------|
          |       20MB       |     (4) 1M x 9     |     (4) 4M x 9     |
          |------------------+--------------------+--------------------|
          |       32MB       |     (4) 4M x 9     |     (4) 4M x 9     |
          |------------------------------------------------------------|
          | Note:8 or 9-bit SIMMs can be used.                         |
          +------------------------------------------------------------+
       
          +------------------------------------------------------------+
          |                  CPU SPEED CONFIGURATION                   |
          |------------------------------------------------------------|
          |       Speed       |  JF0   |  JF1   |    JP6    |   JP10   |
          |-------------------+--------+--------+-----------+----------|
          |       20MHz       | closed | closed | pins 2 &  |   open   |
          |                   |        |        | 3 closed  |          |
          |-------------------+--------+--------+-----------+----------|
          |       25MHz       |  open  | closed | pins 2 &  |   open   |
          |                   |        |        | 3 closed  |          |
          |-------------------+--------+--------+-----------+----------|
          | 33MHz(386/486DLC) | closed |  open  | pins 2 &  | pins 1 & |
          |                   |        |        | 3 closed  | 2 closed |
          |-------------------+--------+--------+-----------+----------|
          |    33MHz(486)     | closed |  open  | pins 2 &  |   open   |
          |                   |        |        | 3 closed  |          |
          |-------------------+--------+--------+-----------+----------|
          |       40MHz       |  open  |  open  | pins 2 &  | pins 1 & |
          |                   |        |        | 3 closed  | 2 closed |
          |-------------------+--------+--------+-----------+----------|
          | 50MHz (internal)  |  open  | closed | pins 2 &  |   open   |
          |                   |        |        | 3 closed  |          |
          |-------------------+--------+--------+-----------+----------|
          |       50MHz       |  open  | closed | pins 1 &  | pins 2 & |
          |                   |        |        | 2 closed  | 3 closed |
          |-------------------+--------+--------+-----------+----------|
          | 66MHz (internal)  | closed |  open  | pins 2 &  |   open   |
          |                   |        |        | 3 closed  |          |
          +------------------------------------------------------------+
       
          +------------------------------------------------------------+
          |                   CPU TYPE CONFIGURATION                   |
          |------------------------------------------------------------|
          |   Type   |  JP5  |  JP9   | JP14  | JP15  | JP16  |  JP17  |
          |----------+-------+--------+-------+-------+-------+--------|
          | 80386DX  |  1 &  | 1 & 2, | 1 & 2 | 1 & 2 |  2 &  | closed |
          |          | 2, 3  | 3 & 4  |       |       | 3, 4  |        |
          |          |  & 4  |        |       |       |  & 5  |        |
          |----------+-------+--------+-------+-------+-------+--------|
          | CX486DLC |  1 &  | 1 & 2, | 1 & 2 | 1 & 2 |  2 &  | closed |
          |          | 2, 3  | 3 & 4  |       |       | 3, 4  |        |
          |          |  & 4  |        |       |       |  & 5  |        |
          |----------+-------+--------+-------+-------+-------+--------|
          | 80486SX  | 2 & 3 |  open  | 1 & 2 | 2 & 3 |  2 &  |  open  |
          |          |       |        |       |       | 3, 4  |        |
          |          |       |        |       |       |  & 5  |        |
          |----------+-------+--------+-------+-------+-------+--------|
          | 80487SX  |  1 &  | 2 & 3  | 2 & 3 | 2 & 3 |  2 &  |  open  |
          |          | 2, 3  |        |       |       | 3, 4  |        |
          |          |  & 4  |        |       |       |  & 5  |        |
          |----------+-------+--------+-------+-------+-------+--------|
          | 80486DX  |  1 &  | 1 & 2  | 2 & 3 | 2 & 3 |  2 &  |  open  |
          |          | 2, 3  |        |       |       | 3, 4  |        |
          |          |  & 4  |        |       |       |  & 5  |        |
          |----------+-------+--------+-------+-------+-------+--------|
          | 80486DX2 |  1 &  | 1 & 2  | 2 & 3 | 2 & 3 |  2 &  |  open  |
          |          | 2, 3  |        |       |       | 3, 4  |        |
          |          |  & 4  |        |       |       |  & 5  |        |
          |------------------------------------------------------------|
          | Note:The location of JP15 is unknown. Pins designated      |
          | should be in the closed position                           |
          +------------------------------------------------------------+