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# SYSTRAN CORPORATION
SCRAMNET+ REHOSTABLE ADAPTER EVALUATION BOARD
NIC Type Proprietary
Chipset Systran Corporation
Maximum Onboard Memory 2MB DRAM (on daughterboard)
I/O Options Bypass connector
Network Transfer Rate 150Mbps
Data Bus VME double
Topology Linear Bus/Ring
Wire Type RG-58A/U 50ohm coaxial
Fiber optic cable
Boot ROM Not available
IMG IMG 1
+------------------------------------------------------------+
| CONNECTIONS |
|------------------------------------------------------------|
| Function | Label | Function | Label |
|------------------------+-------+-------------------+-------|
| Header to | J1A | Testing pins | J7 |
| daughterboard J1B | | | |
|------------------------+-------+-------------------+-------|
| Header to main board | J1B | Media board | J10 |
| J1A | | header | |
|------------------------+-------+-------------------+-------|
| Header to | J2A | Bypass connector | J13 |
| daughterboard J2B | | | |
|------------------------+-------+-------------------+-------|
| Header to main board | J2B | RG-58A/U 50ohm | W1A |
| J2A | | coaxial receive | |
| | | connector 1 | |
|------------------------+-------+-------------------+-------|
| Header to | J3A | Fiber optic ST | W1B |
| daughterboard J3B | | receive connector | |
| | | 1 | |
|------------------------+-------+-------------------+-------|
| Header to main board | J3B | Fiber optic SC | W1C |
| J3A | | receive connector | |
| | | 1 | |
|------------------------+-------+-------------------+-------|
| Unidentified | J4 | RG-58A/U 50ohm | W2A |
| | | coaxial receive | |
| | | connector 2 | |
|------------------------+-------+-------------------+-------|
| Testing pins | J6 | Fiber optic ST | W2B |
| | | receive connector | |
| | | 2 | |
|------------------------+-------+-------------------+-------|
| Fiber optic SC receive | W2C | Fiber optic ST | W4B |
| connector 2 | | transmit | |
| | | connector 2 | |
|------------------------+-------+-------------------+-------|
| RG-58A/U 50ohm coaxial | W3A | Fiber optic SC | W4C |
| transmit connector 1 | | transmit | |
| | | connector 2 | |
|------------------------+-------+-------------------+-------|
| Fiber optic ST | W3B | Header to main | W5A |
| transmit connector 1 | | board J10 | |
|------------------------+-------+-------------------+-------|
| Fiber optic SC | W3C | Header to main | W5B |
| transmit connector 1 | | board J10 | |
|------------------------+-------+-------------------+-------|
| RG-58A/U 50ohm coaxial | W4A | Header to main | W5C |
| transmit connector 2 | | board J10 | |
+------------------------------------------------------------+
+------------------------------------------------------------+
| USER CONFIGURABLE SETTINGS |
|------------------------------------------------------------|
| Setting | Label | Position |
|-------------------------------------+-------+--------------|
| » | Media card power source is | H2A | Pins 1 & 2 |
| | internal | | closed |
|---+---------------------------------+-------+--------------|
| | Media card power source is | H2A | Pins 2 & 3 |
| | external | | closed |
|---+---------------------------------+-------+--------------|
| » | Media card power source is | H2B | Pins 1 & 2 |
| | internal | | closed |
|---+---------------------------------+-------+--------------|
| | Media card power source is | H2B | Pins 2 & 3 |
| | external | | closed |
|---+---------------------------------+-------+--------------|
| | EEPROM write protect disabled | J4B | Pins 3 & 4 |
| | | | closed |
|---+---------------------------------+-------+--------------|
| | EEPROM write protect enabled | J4B | Pins 1 & 2 |
| | | | closed |
|---+---------------------------------+-------+--------------|
| » | Address bits for internal CSR | J5 | Closed |
| | enabled | | |
|---+---------------------------------+-------+--------------|
| | Address bits for internal CSR | J5 | Open |
| | disabled | | |
|---+---------------------------------+-------+--------------|
| | EEPROM read protect disabled | J5B | Pins 3 & 4 |
| | | | closed |
|---+---------------------------------+-------+--------------|
| | EEPROM read protect enabled | J5B | Pins 1 & 2 |
| | | | closed |
|---+---------------------------------+-------+--------------|
| » | Address bits for memory enabled | J8 | Closed |
|---+---------------------------------+-------+--------------|
| | Address bits for memory | J8 | Open |
| | disabled | | |
|---+---------------------------------+-------+--------------|
| » | Address bits for external CSR | J9 | Closed |
| | enabled | | |
|---+---------------------------------+-------+--------------|
| | Address bits for external CSR | J9 | Open |
| | disabled | | |
|---+---------------------------------+-------+--------------|
| » | TRIG1/TRIG2 | J11 | Unidentified |
|---+---------------------------------+-------+--------------|
| | Chassis ground connected to | J12 | Pins 3 & 4 |
| | signal ground | | closed |
|---+---------------------------------+-------+--------------|
| | Chassis ground not connected to | J12 | Pins 1 & 2 |
| | signal ground | | closed |
+------------------------------------------------------------+
+------------------------------------------------------------+
| DRAM CONFIGURATION |
|------------------------------------------------------------|
| 512KB, 1MB, or 2MB of memory may be factory installed on |
| the daughterboard. The circuitry supports up to 8MB of |
| memory. For other memory configurations, the user must |
| provide an external memory interface. |
+------------------------------------------------------------+
+------------------------------------------------------------+
| CSR ADDRESS SELECTION |
|------------------------------------------------------------|
| Setting | S1 |
|-------------------------------+----------------------------|
| » | 00h, 20h | Position 0 |
|---+---------------------------+----------------------------|
| | 40h, 60h | Position 4 |
|---+---------------------------+----------------------------|
| | 80h, 80h | Position 8 |
|---+---------------------------+----------------------------|
| | C0h, E0h | Position C |
+------------------------------------------------------------+
+------------------------------------------------------------+
| DIAGNOSTIC LED(S) |
|------------------------------------------------------------|
| LED | Color | Status | Condition |
|------+--------+--------+-----------------------------------|
| LED1 | Green | On | Network connection is good |
|------+--------+--------+-----------------------------------|
| LED1 | Green | Off | Network connection is broken |
|------+--------+--------+-----------------------------------|
| LED2 | Green | On | Message is waiting in transmit |
| | | | FIFO |
|------+--------+--------+-----------------------------------|
| LED2 | Green | Off | Message is not waiting in |
| | | | transmit FIFO |
|------+--------+--------+-----------------------------------|
| LED3 | Green | On | Carrier signal is detected |
|------+--------+--------+-----------------------------------|
| LED3 | Green | Off | Carrier signal is not detected |
|------+--------+--------+-----------------------------------|
| LED4 | Yellow | On | Error condition detected |
|------+--------+--------+-----------------------------------|
| LED4 | Yellow | Off | Error condition not detected |
|------+--------+--------+-----------------------------------|
| LED5 | Green | On | Message received from this node |
|------+--------+--------+-----------------------------------|
| LED5 | Green | Off | Message not received from this |
| | | | node |
|------+--------+--------+-----------------------------------|
| LED6 | Green | On | Message received from another |
| | | | node |
|------+--------+--------+-----------------------------------|
| LED6 | Green | Off | Message not received from another |
| | | | node |
+------------------------------------------------------------+
+------------------------------------------------------------+
| MISCELLANEOUS TECHNICAL NOTE |
|------------------------------------------------------------|
| The daughterboard is designed as a prototyping card for |
| the user to design a VME bus network interface around. The |
| main board shown above is only an evaluation board and is |
| a separate product. |
+------------------------------------------------------------+